Autonomous AI-powered protection system for 3U CubeSat solar panels using dual-layer hardware comparators and Random Forest machine learning.
This system protects solar panels from catastrophic failures (short circuits, hot spots, delamination) through:
- Layer 1: Always-on hardware comparators (2×P_nominal threshold) - catches instantaneous faults in <1μs
- Layer 2: AI-gated adaptive comparators (1.2×P_nominal) - catches pre-failure signatures in 5-10s
- Online Learning: Per-panel bias correction adapts to radiation degradation without retraining
Trained on NEPALISAT-1 telemetry, validated cross-satellite on RAAVANA, deployable to any 3U CubeSat.
| Requirement | Our Solution | Evidence |
|---|---|---|
| 1. Subsystem Analysis | EPS solar panel protection | docs/failure_modes_analysis.md |
| 2. Electronics Only | PCB-based comparators + MOSFETs | hardware/CIRCUIT_DESIGN.md |
| 3. AI Integration | Random Forest (157μs inference) | models/ + c_code |
| 4. Space Readiness | 3U volume, <200mW power, rad-tolerant | hardware/BOM.csv |
| 5. Validation | Cross-satellite testing (NEPALISAT→RAAVANA) | notebooks/training_validation.ipynb |
| 6. Documentation | Full schematics, code, test protocols | This repo |
| 7. Integration | Standard CubeSat EPS interface | stm32_package |
Response Times: Hardware <1μs, AI prediction 157μs, total system <200μs
cubesat-solar-fdir/
│
├── README.md ← You are here
├── docs/
│ ├── IASS_EPS_FDIR_Report.pdf ← 3-page technical report
│ ├── failure_modes_analysis.md ← CubeSat PV failure modes research
│ ├── system_architecture.md ← Block diagrams & design rationale
│ └── validation_results.md ← Cross-satellite testing results
│
├── hardware/
│ ├── CIRCUIT_DESIGN.md ← Complete circuit design (dual-layer)
│ ├── schematics/
│ │ ├── dual_layer_comparator.pdf ← Layer 1 + Layer 2 schematic
│ │ ├── mosfet_control.pdf ← P-channel MOSFET switching circuit
│ │ └── stm32_pinout.pdf ← MCU GPIO/ADC mapping (13 panels)
│ ├── BOM.csv ← Bill of materials ($53.30)
│ └── pcb_layout/ ← (Optional) KiCad/Eagle files
│
├── models/
│ ├── training_artifacts/
│ │ ├── RandomForest_power.pkl ← Trained power prediction model
│ │ └── RandomForest_voltage.pkl ← Trained voltage prediction model
│ └── metrics/
│ ├── cross_validation_nepalisat.json ← 5-panel validation
│ └── cross_satellite_raavana.json ← RAAVANA transfer test
│
├── data/
│ ├── NEPALISAT/
│ │ ├── panel_posX.csv ← Training data (5 panels)
│ │ ├── panel_negX.csv
│ │ ├── panel_Y.csv
│ │ ├── panel_posZ.csv
│ │ └── panel_negZ.csv
│ └── RAAVANA/
│ └── validation_set.csv ← Cross-satellite test data
│
├── notebooks/
│ └── training_validation.ipynb ← Model training + generalization tests
│
├── deploy/
│ ├── c_code/
│ │ ├── power_model.c ← Generated RF inference (121 KB)
│ │ ├── voltage_model.c ← Generated RF inference (369 KB)
│ │ └── Makefile ← Build instructions
│ │
│ └── stm32_package/
│ ├── eps_protection_final.c ← State machine (4 states)
│ ├── eps_protection_final.h
│ ├── eps_main_deployment.c ← Main loop (13 panels)
│ ├── eps_bias_corrector.h ← Online learning (EWMA)
│ ├── eps_hardware_config.h ← GPIO/ADC pin mappings
│ └── README_DEPLOYMENT.md ← Integration guide
│
├── simulation/
│ ├── fault_injection.py ← Test scenarios (short, open, shade)
│ └── test_results/
│ ├── short_circuit_response.png
│ ├── false_positive_rate.png
│ └── recovery_timing.png
│
└── tests/
├── test_protection_logic.c ← Unit tests (state machine)
├── test_model_inference.c ← Inference accuracy tests
└── test_hardware_interface.c ← GPIO/ADC mock tests
┌─────────────────────────────────────────────────────────────────────┐
│ PER-PANEL PIPELINE │
│ (Replicate 13 times for deployment) │
└─────────────────────────────────────────────────────────────────────┘
HARDWARE SENSORS (5s cadence)
├─ Voltage (ADC) ──────┐
├─ Current (INA219) ───┤
└─ Temperature ────────┤
↓
┌──────────────────────────────────────────────────────────────┐
│ FEATURE ENGINEERING (MCU - C code) │
│ ├─ Circular history buffer (12 samples = 60s) │
│ ├─ Power features: [P, P_lag1, P_lag2...P_lag12] │
│ ├─ Voltage features: [V, V_lag1, V_lag2...V_lag6] │
│ └─ Derivatives: dP/dt, dV/dt (first-order difference) │
└──────────────────────────────────────────────────────────────┘
↓
┌──────────────────────────────────────────────────────────────┐
│ AI INFERENCE (Random Forest - Generated C code) │
│ ├─ models/RandomForest_power.pkl → deploy/c_code/power_model.c │
│ ├─ models/RandomForest_voltage.pkl → deploy/c_code/voltage_model.c │
│ ├─ Inference time: 157μs │
│ └─ Output: P_predicted, V_predicted │
└──────────────────────────────────────────────────────────────┘
↓
┌──────────────────────────────────────────────────────────────┐
│ ONLINE BIAS CORRECTION (Per-panel adaptive learning) │
│ ├─ bias = α × (P_measured - P_predicted) + (1-α) × bias │
│ ├─ α = 0.01 (slow adaptation, 100-sample memory) │
│ ├─ Handles: Radiation degradation, panel aging │
│ └─ Output: P_corrected = P_predicted + bias │
└──────────────────────────────────────────────────────────────┘
↓
┌──────────────────────────────────────────────────────────────┐
│ ANOMALY DETECTION (4 conditions, 2/4 trigger) │
│ 1. Power spike: P_pred > 1.2×P_nominal │
│ 2. Voltage drop: V_measured < V_pred - 1.0V │
│ 3. High dynamics: |dP/dt|>2.0 & |dV/dt|>0.5 │
│ 4. Large residual: |P_measured - P_pred| > 3σ │
│ └─> IF 2+ conditions TRUE → Enable Layer 2 comparator │
└──────────────────────────────────────────────────────────────┘
↓
┌──────────────────────────────────────────────────────────────┐
│ DUAL-LAYER HARDWARE PROTECTION (Analog circuits) │
│ │
│ LAYER 1 (Always-On): │
│ ├─ Threshold: 2.0 × P_nominal (~16.8W for 8.4W panel) │
│ ├─ Response: <1μs (LM339 comparator) │
│ └─ Purpose: Catch catastrophic shorts instantly │
│ │
│ LAYER 2 (AI-Gated): │
│ ├─ Threshold: 1.2 × P_nominal (~10W) │
│ ├─ Enabled by: MCU GPIO when anomaly detected │
│ ├─ Response: <1μs after enabled (5-10s detection time) │
│ └─ Purpose: Catch pre-failure signatures (shading, cracks) │
│ │
│ MOSFET Control: │
│ ├─ P-channel Si2301 (20V, 2.3A) │
│ ├─ Gate = OR(Layer1_Trip, Layer2_Trip) │
│ └─ Trip → Panel isolated from bus │
└──────────────────────────────────────────────────────────────┘
↓
┌──────────────────────────────────────────────────────────────┐
│ STATE MACHINE (Per-panel recovery logic) │
│ │
│ COMP_DISABLED (Normal operation) │
│ └─> Anomaly detected → COMP_ENABLED │
│ │
│ COMP_ENABLED (Layer 2 active) │
│ ├─> Hardware trips → COMP_TRIPPED │
│ ├─> Stable 30s → COMP_DISABLED (false alarm) │
│ └─> Timeout 5min → COMP_DISABLED (false alarm) │
│ │
│ COMP_TRIPPED (Panel isolated) │
│ └─> Await ground command → COMP_RECOVERY │
│ │
│ COMP_RECOVERY (Ground-approved re-enable) │
│ ├─> Stable 2min → COMP_DISABLED (success) │
│ └─> Anomaly returns → COMP_TRIPPED (failed) │
└──────────────────────────────────────────────────────────────┘
↓
TELEMETRY
(Logs sent to ground station)
PHASE 1: Training (NEPALISAT-1 data)
├─ Data: 5 panels × 10,000+ samples (LEO orbit telemetry)
├─ Features: Power/Voltage + derivatives (2 features per target)
├─ Model: Random Forest (100 trees, max_depth=10)
├─ Result: 98.6% accuracy (MAE=0.034W for power)
└─ Export: models/RandomForest_power.pkl
PHASE 2: Cross-Panel Validation (NEPALISAT-1)
├─ Train on: +X panel
├─ Test on: -X, Y, +Z, -Z panels
├─ Result: Generalizes well (MAE <0.05W across panels)
└─ Conclusion: Single model works for multiple panels
PHASE 3: Cross-Satellite Validation (RAAVANA)
├─ Train on: NEPALISAT-1 (5 panels)
├─ Test on: RAAVANA (different satellite, same physics)
├─ Result: Transfers without retraining (MAE <0.08W)
└─ Conclusion: Generic model + bias correction enables rapid deployment
PHASE 4: Code Generation (m2cgen)
├─ Input: models/RandomForest_power.pkl
├─ Tool: m2cgen (Python → C transpiler)
├─ Output: deploy/c_code/power_model.c (121 KB, 157μs inference)
└─ Integration: Called by eps_main_deployment.c
PHASE 5: Hardware Integration (STM32F4)
├─ MCU: STM32F496ZGTx (168MHz, 1MB Flash, 192KB RAM)
├─ GPIO: 13 enable pins (PA0-PA12) for Layer 2 comparators
├─ ADC: 13 channels (PC0-PD12) for MOSFET feedback detection
├─ Memory: 490 KB models + 1.7 KB runtime state (13 panels)
└─ Power: <50mW for MCU + 10mW/panel comparators = <180mW total
git clone https://github.com/yourusername/cubesat-solar-fdir.git
cd cubesat-solar-fdirjupyter notebook notebooks/training_validation.ipynb
# Run all cells to reproduce training + validation resultspip install m2cgen scikit-learn
python generate_power_model_c.py
python generate_voltage_model_c.py
# Output: deploy/c_code/power_model.c, voltage_model.ccd deploy/stm32_package
# Update eps_hardware_config.h with your GPIO pins
make all
# Flash: make flash (requires ST-Link)cd simulation
python fault_injection.py --scenario short_circuit
# Validates: Detection time, false positive rate, recovery logic| Metric | Value | Requirement | Status |
|---|---|---|---|
| Inference Time | 157μs | <10ms | ✅ 63× faster |
| Detection Time | 5-10s (Layer 2) | <seconds | ✅ |
| Hardware Response | <1μs (Layer 1) | <1ms | ✅ 1000× faster |
| Model Size | 121 KB (power) + 369 KB (voltage) | <1MB | ✅ |
| RAM Usage | 1.7 KB (13 panels) | <10KB | ✅ |
| Power Consumption | <180mW | <500mW | ✅ |
| Prediction Accuracy | 98.6% (MAE=0.034W) | >95% | ✅ |
| False Positive Rate | <1% | <5% | ✅ |
| Cross-Satellite Transfer | MAE=0.08W (RAAVANA) | N/A | ✅ Bonus! |
| Component | Part Number | Quantity | Unit Price | Purpose |
|---|---|---|---|---|
| Comparator (Layer 1) | LM339 | 1 | $0.50 | Always-on protection (2×P_nom) |
| Comparator (Layer 2) | LM339 | 1 | $0.50 | AI-gated protection (1.2×P_nom) |
| OR Gate | 74HC32 | 1 | $0.30 | Combine Layer 1 + Layer 2 |
| P-Channel MOSFET | Si2301 | 1 | $0.80 | Panel isolation switch |
| Current Sensor | INA219 | 1 | $2.50 | Measure panel current |
| Resistors/Caps | Various | - | $0.50 | Voltage dividers, filtering |
| Per Panel Total | $5.10 | × 13 panels = $66.30 |
+ STM32F496ZGTx MCU: $12.00
Total System Cost: $78.30 (well within CubeSat budgets)
docs/IASS_EPS_FDIR_Report.pdf (3 pages):
- Page 1: System architecture & dual-layer design
- Page 2: AI approach & cross-satellite validation
- Page 3: Performance metrics & space readiness
hardware/CIRCUIT_DESIGN.md:
- Complete schematics with component values
- STM32 pin mappings (GPIO + ADC)
- Layer 1 + Layer 2 comparator circuits
- MOSFET control logic with OR gate
deploy/stm32_package/README_DEPLOYMENT.md:
- Integration with CubeSat EPS
- GPIO configuration instructions
- Telemetry interface specification
- Ground command protocol
docs/validation_results.md:
- Cross-panel testing (NEPALISAT)
- Cross-satellite testing (RAAVANA)
- Fault injection scenarios
- False positive analysis
# Test 1: Short circuit (instant power spike)
python fault_injection.py --scenario short_circuit
# Expected: Layer 1 trips in <1μs, panel isolated
# Test 2: Gradual shading (power drop over 30s)
python fault_injection.py --scenario shading
# Expected: Layer 2 enables after 10s, comparator monitors
# Test 3: False alarm (transient noise)
python fault_injection.py --scenario noise
# Expected: Layer 2 enables, auto-disables after 30s (no trip)
# Test 4: Recovery after trip
python fault_injection.py --scenario recovery
# Expected: Ground command → re-enable → 2min monitoring → success/failcd tests
make test_protection_logic # State machine transitions
make test_model_inference # RF accuracy on new data
make test_hardware_interface # GPIO/ADC mocking- Section 4: RAAVANA data loading
- Section 5: Transfer learning evaluation
- Result: Model trained on NEPALISAT achieves MAE=0.08W on RAAVANA (no retraining!)
- Dual-Layer Protection: Hardware fail-safe + AI pre-failure detection (most teams do only one)
- Cross-Satellite Validation: Proven transfer learning (NEPALISAT→RAAVANA) shows robustness
- Online Adaptation: Bias correction handles radiation degradation without ground intervention
- Production-Ready: Complete firmware, hardware design, and BOM (<$80 total cost)
- Minimal Resources: 490 KB Flash, 1.7 KB RAM, <180mW power (fits any 3U CubeSat)
MIT License - See LICENSE for details.
[Your Team Name] - IASS CubeSat Challenge 2025
Contact: [your-email@university.edu]
- NEPALISAT-1 Team: For open-access telemetry data
- RAAVANA Team: For validation dataset
- m2cgen: For seamless Python→C model transpilation
- STMicroelectronics: For STM32CubeIDE development tools
⭐ If you find this project useful, please star this repository!
This README provides the complete picture judges need to understand:
- ✅ What you built (dual-layer AI+hardware system)
- ✅ Why design choices were made (fail-safe, cross-satellite generalization)
- ✅ How everything connects (block diagram + file structure)
- ✅ Evidence it works (metrics, validation results, BOM)
- ✅ How to use it (quick start, testing, deployment)
Let me know if you want me to adjust any section! 🚀