Merge pull request #3961 from Dhirenderchoudhary/fix/pre-post-step-hooks

maliberty · web-flow · commit b71a488f666d · 2026-03-12T11:44:00.000Z
Add systematic PRE/POST Tcl hooks for flow steps
diff --git a/docs/user/FlowVariables.md b/docs/user/FlowVariables.md
@@ -192,7 +192,39 @@ configuration file.
 | <a name="PLATFORM"></a>PLATFORM| Specifies process design kit or technology node to be used.| |
 | <a name="PLATFORM_TCL"></a>PLATFORM_TCL| Specifies a Tcl script with commands to run before loading design.| |
 | <a name="POST_CTS_TCL"></a>POST_CTS_TCL| Specifies a Tcl script with commands to run after CTS is completed.| |
+| <a name="POST_DENSITY_FILL_TCL"></a>POST_DENSITY_FILL_TCL| Specifies a Tcl script with commands to run after density fill.| |
+| <a name="POST_DETAIL_PLACE_TCL"></a>POST_DETAIL_PLACE_TCL| Specifies a Tcl script with commands to run after detailed placement.| |
+| <a name="POST_DETAIL_ROUTE_TCL"></a>POST_DETAIL_ROUTE_TCL| Specifies a Tcl script with commands to run after detailed route.| |
+| <a name="POST_FILLCELL_TCL"></a>POST_FILLCELL_TCL| Specifies a Tcl script with commands to run after fillcell insertion.| |
+| <a name="POST_FINAL_REPORT_TCL"></a>POST_FINAL_REPORT_TCL| Specifies a Tcl script with commands to run after final report generation.| |
+| <a name="POST_FLOORPLAN_TCL"></a>POST_FLOORPLAN_TCL| Specifies a Tcl script with commands to run after floorplan is completed.| |
+| <a name="POST_GLOBAL_PLACE_SKIP_IO_TCL"></a>POST_GLOBAL_PLACE_SKIP_IO_TCL| Specifies a Tcl script with commands to run after global placement (skip IO).| |
+| <a name="POST_GLOBAL_PLACE_TCL"></a>POST_GLOBAL_PLACE_TCL| Specifies a Tcl script with commands to run after global placement.| |
+| <a name="POST_GLOBAL_ROUTE_TCL"></a>POST_GLOBAL_ROUTE_TCL| Specifies a Tcl script with commands to run after global route.| |
+| <a name="POST_IO_PLACEMENT_TCL"></a>POST_IO_PLACEMENT_TCL| Specifies a Tcl script with commands to run after IO placement.| |
+| <a name="POST_MACRO_PLACE_TCL"></a>POST_MACRO_PLACE_TCL| Specifies a Tcl script with commands to run after macro placement.| |
+| <a name="POST_PDN_TCL"></a>POST_PDN_TCL| Specifies a Tcl script with commands to run after PDN generation.| |
+| <a name="POST_REPAIR_TIMING_POST_PLACE_TCL"></a>POST_REPAIR_TIMING_POST_PLACE_TCL| Specifies a Tcl script with commands to run after post-place timing repair.| |
+| <a name="POST_RESIZE_TCL"></a>POST_RESIZE_TCL| Specifies a Tcl script with commands to run after resize.| |
+| <a name="POST_SYNTH_TCL"></a>POST_SYNTH_TCL| Specifies a Tcl script with commands to run after synthesis ODB generation.| |
+| <a name="POST_TAPCELL_TCL"></a>POST_TAPCELL_TCL| Specifies a Tcl script with commands to run after tapcell.| |
+| <a name="PRE_CTS_TCL"></a>PRE_CTS_TCL| Specifies a Tcl script with commands to run before CTS.| |
+| <a name="PRE_DENSITY_FILL_TCL"></a>PRE_DENSITY_FILL_TCL| Specifies a Tcl script with commands to run before density fill.| |
+| <a name="PRE_DETAIL_PLACE_TCL"></a>PRE_DETAIL_PLACE_TCL| Specifies a Tcl script with commands to run before detailed placement.| |
+| <a name="PRE_DETAIL_ROUTE_TCL"></a>PRE_DETAIL_ROUTE_TCL| Specifies a Tcl script with commands to run before detailed route.| |
+| <a name="PRE_FILLCELL_TCL"></a>PRE_FILLCELL_TCL| Specifies a Tcl script with commands to run before fillcell insertion.| |
+| <a name="PRE_FINAL_REPORT_TCL"></a>PRE_FINAL_REPORT_TCL| Specifies a Tcl script with commands to run before final report generation.| |
+| <a name="PRE_FLOORPLAN_TCL"></a>PRE_FLOORPLAN_TCL| Specifies a Tcl script with commands to run before floorplan.| |
+| <a name="PRE_GLOBAL_PLACE_SKIP_IO_TCL"></a>PRE_GLOBAL_PLACE_SKIP_IO_TCL| Specifies a Tcl script with commands to run before global placement (skip IO).| |
+| <a name="PRE_GLOBAL_PLACE_TCL"></a>PRE_GLOBAL_PLACE_TCL| Specifies a Tcl script with commands to run before global placement.| |
 | <a name="PRE_GLOBAL_ROUTE_TCL"></a>PRE_GLOBAL_ROUTE_TCL| Specifies a Tcl script with commands to run before global route.| |
+| <a name="PRE_IO_PLACEMENT_TCL"></a>PRE_IO_PLACEMENT_TCL| Specifies a Tcl script with commands to run before IO placement.| |
+| <a name="PRE_MACRO_PLACE_TCL"></a>PRE_MACRO_PLACE_TCL| Specifies a Tcl script with commands to run before macro placement.| |
+| <a name="PRE_PDN_TCL"></a>PRE_PDN_TCL| Specifies a Tcl script with commands to run before PDN generation.| |
+| <a name="PRE_REPAIR_TIMING_POST_PLACE_TCL"></a>PRE_REPAIR_TIMING_POST_PLACE_TCL| Specifies a Tcl script with commands to run before post-place timing repair.| |
+| <a name="PRE_RESIZE_TCL"></a>PRE_RESIZE_TCL| Specifies a Tcl script with commands to run before resize.| |
+| <a name="PRE_SYNTH_TCL"></a>PRE_SYNTH_TCL| Specifies a Tcl script with commands to run before synthesis ODB generation.| |
+| <a name="PRE_TAPCELL_TCL"></a>PRE_TAPCELL_TCL| Specifies a Tcl script with commands to run before tapcell.| |
 | <a name="PROCESS"></a>PROCESS| Technology node or process in use.| |
 | <a name="PWR_NETS_VOLTAGES"></a>PWR_NETS_VOLTAGES| Used for IR Drop calculation.| |
 | <a name="RCX_RULES"></a>RCX_RULES| RC Extraction rules file path.| |
@@ -291,6 +323,8 @@ configuration file.
 - [DFF_MAP_FILE](#DFF_MAP_FILE)
 - [LATCH_MAP_FILE](#LATCH_MAP_FILE)
 - [MIN_BUF_CELL_AND_PORTS](#MIN_BUF_CELL_AND_PORTS)
+- [POST_SYNTH_TCL](#POST_SYNTH_TCL)
+- [PRE_SYNTH_TCL](#PRE_SYNTH_TCL)
 - [SDC_FILE](#SDC_FILE)
 - [SDC_GUT](#SDC_GUT)
 - [SYNTH_ARGS](#SYNTH_ARGS)
@@ -349,6 +383,14 @@ configuration file.
 - [PLACE_DENSITY](#PLACE_DENSITY)
 - [PLACE_DENSITY_LB_ADDON](#PLACE_DENSITY_LB_ADDON)
 - [PLACE_SITE](#PLACE_SITE)
+- [POST_FLOORPLAN_TCL](#POST_FLOORPLAN_TCL)
+- [POST_MACRO_PLACE_TCL](#POST_MACRO_PLACE_TCL)
+- [POST_PDN_TCL](#POST_PDN_TCL)
+- [POST_TAPCELL_TCL](#POST_TAPCELL_TCL)
+- [PRE_FLOORPLAN_TCL](#PRE_FLOORPLAN_TCL)
+- [PRE_MACRO_PLACE_TCL](#PRE_MACRO_PLACE_TCL)
+- [PRE_PDN_TCL](#PRE_PDN_TCL)
+- [PRE_TAPCELL_TCL](#PRE_TAPCELL_TCL)
 - [REMOVE_ABC_BUFFERS](#REMOVE_ABC_BUFFERS)
 - [ROUTING_LAYER_ADJUSTMENT](#ROUTING_LAYER_ADJUSTMENT)
 - [RTLMP_AREA_WT](#RTLMP_AREA_WT)
@@ -408,6 +450,18 @@ configuration file.
 - [PLACE_DENSITY](#PLACE_DENSITY)
 - [PLACE_DENSITY_LB_ADDON](#PLACE_DENSITY_LB_ADDON)
 - [PLACE_PINS_ARGS](#PLACE_PINS_ARGS)
+- [POST_DETAIL_PLACE_TCL](#POST_DETAIL_PLACE_TCL)
+- [POST_GLOBAL_PLACE_SKIP_IO_TCL](#POST_GLOBAL_PLACE_SKIP_IO_TCL)
+- [POST_GLOBAL_PLACE_TCL](#POST_GLOBAL_PLACE_TCL)
+- [POST_IO_PLACEMENT_TCL](#POST_IO_PLACEMENT_TCL)
+- [POST_REPAIR_TIMING_POST_PLACE_TCL](#POST_REPAIR_TIMING_POST_PLACE_TCL)
+- [POST_RESIZE_TCL](#POST_RESIZE_TCL)
+- [PRE_DETAIL_PLACE_TCL](#PRE_DETAIL_PLACE_TCL)
+- [PRE_GLOBAL_PLACE_SKIP_IO_TCL](#PRE_GLOBAL_PLACE_SKIP_IO_TCL)
+- [PRE_GLOBAL_PLACE_TCL](#PRE_GLOBAL_PLACE_TCL)
+- [PRE_IO_PLACEMENT_TCL](#PRE_IO_PLACEMENT_TCL)
+- [PRE_REPAIR_TIMING_POST_PLACE_TCL](#PRE_REPAIR_TIMING_POST_PLACE_TCL)
+- [PRE_RESIZE_TCL](#PRE_RESIZE_TCL)
 - [ROUTING_LAYER_ADJUSTMENT](#ROUTING_LAYER_ADJUSTMENT)
 - [SKIP_REPORT_METRICS](#SKIP_REPORT_METRICS)
 - [TNS_END_PERCENT](#TNS_END_PERCENT)
@@ -430,6 +484,7 @@ configuration file.
 - [MATCH_CELL_FOOTPRINT](#MATCH_CELL_FOOTPRINT)
 - [MAX_REPAIR_TIMING_ITER](#MAX_REPAIR_TIMING_ITER)
 - [POST_CTS_TCL](#POST_CTS_TCL)
+- [PRE_CTS_TCL](#PRE_CTS_TCL)
 - [REMOVE_CELLS_FOR_EQY](#REMOVE_CELLS_FOR_EQY)
 - [REPORT_CLOCK_SKEW](#REPORT_CLOCK_SKEW)
 - [SETUP_REPAIR_SEQUENCE](#SETUP_REPAIR_SEQUENCE)
@@ -453,6 +508,7 @@ configuration file.
 - [MAX_REPAIR_TIMING_ITER](#MAX_REPAIR_TIMING_ITER)
 - [MAX_ROUTING_LAYER](#MAX_ROUTING_LAYER)
 - [MIN_ROUTING_LAYER](#MIN_ROUTING_LAYER)
+- [POST_GLOBAL_ROUTE_TCL](#POST_GLOBAL_ROUTE_TCL)
 - [PRE_GLOBAL_ROUTE_TCL](#PRE_GLOBAL_ROUTE_TCL)
 - [REPORT_CLOCK_SKEW](#REPORT_CLOCK_SKEW)
 - [ROUTING_LAYER_ADJUSTMENT](#ROUTING_LAYER_ADJUSTMENT)
@@ -478,6 +534,10 @@ configuration file.
 - [MAX_REPAIR_ANTENNAS_ITER_DRT](#MAX_REPAIR_ANTENNAS_ITER_DRT)
 - [MAX_ROUTING_LAYER](#MAX_ROUTING_LAYER)
 - [MIN_ROUTING_LAYER](#MIN_ROUTING_LAYER)
+- [POST_DETAIL_ROUTE_TCL](#POST_DETAIL_ROUTE_TCL)
+- [POST_FILLCELL_TCL](#POST_FILLCELL_TCL)
+- [PRE_DETAIL_ROUTE_TCL](#PRE_DETAIL_ROUTE_TCL)
+- [PRE_FILLCELL_TCL](#PRE_FILLCELL_TCL)
 - [REPORT_CLOCK_SKEW](#REPORT_CLOCK_SKEW)
 - [ROUTING_LAYER_ADJUSTMENT](#ROUTING_LAYER_ADJUSTMENT)
 - [SKIP_ANTENNA_REPAIR_POST_DRT](#SKIP_ANTENNA_REPAIR_POST_DRT)
@@ -491,6 +551,10 @@ configuration file.
 - [GND_NETS_VOLTAGES](#GND_NETS_VOLTAGES)
 - [MAX_ROUTING_LAYER](#MAX_ROUTING_LAYER)
 - [MIN_ROUTING_LAYER](#MIN_ROUTING_LAYER)
+- [POST_DENSITY_FILL_TCL](#POST_DENSITY_FILL_TCL)
+- [POST_FINAL_REPORT_TCL](#POST_FINAL_REPORT_TCL)
+- [PRE_DENSITY_FILL_TCL](#PRE_DENSITY_FILL_TCL)
+- [PRE_FINAL_REPORT_TCL](#PRE_FINAL_REPORT_TCL)
 - [PWR_NETS_VOLTAGES](#PWR_NETS_VOLTAGES)
 - [REPORT_CLOCK_SKEW](#REPORT_CLOCK_SKEW)
 - [ROUTING_LAYER_ADJUSTMENT](#ROUTING_LAYER_ADJUSTMENT)
diff --git a/flow/scripts/cts.tcl b/flow/scripts/cts.tcl
@@ -3,6 +3,7 @@ source $::env(SCRIPTS_DIR)/load.tcl
 source $::env(SCRIPTS_DIR)/lec_check.tcl
 erase_non_stage_variables cts
 load_design 3_place.odb 3_place.sdc
+source_step_tcl PRE CTS
 
 # Clone clock tree inverters next to register loads
 # so cts does not try to buffer the inverted clocks.
@@ -86,7 +87,7 @@ if { !$::env(SKIP_CTS_REPAIR_TIMING) } {
 
 report_metrics 4 "cts final"
 
-source_env_var_if_exists POST_CTS_TCL
+source_step_tcl POST CTS
 
 orfs_write_db $::env(RESULTS_DIR)/4_1_cts.odb
 orfs_write_sdc $::env(RESULTS_DIR)/4_cts.sdc
diff --git a/flow/scripts/density_fill.tcl b/flow/scripts/density_fill.tcl
@@ -1,6 +1,7 @@
 source $::env(SCRIPTS_DIR)/load.tcl
 erase_non_stage_variables final
 load_design 5_route.odb 5_route.sdc
+source_step_tcl PRE DENSITY_FILL
 
 if { $::env(USE_FILL) } {
   set_propagated_clock [all_clocks]
@@ -13,3 +14,5 @@ if { $::env(USE_FILL) } {
   log_cmd exec cp $::env(RESULTS_DIR)/5_route.odb $::env(RESULTS_DIR)/6_1_fill.odb
   # There is no 5_route.v file to copy
 }
+
+source_step_tcl POST DENSITY_FILL
diff --git a/flow/scripts/detail_place.tcl b/flow/scripts/detail_place.tcl
@@ -2,6 +2,7 @@ utl::set_metrics_stage "detailedplace__{}"
 source $::env(SCRIPTS_DIR)/load.tcl
 erase_non_stage_variables place
 load_design 3_4_place_resized.odb 2_floorplan.sdc
+source_step_tcl PRE DETAIL_PLACE
 
 source $::env(PLATFORM_DIR)/setRC.tcl
 
@@ -38,4 +39,6 @@ if { $result != 0 } {
 
 report_metrics 3 "detailed place" true false
 
+source_step_tcl POST DETAIL_PLACE
+
 orfs_write_db $::env(RESULTS_DIR)/3_5_place_dp.odb
diff --git a/flow/scripts/detail_route.tcl b/flow/scripts/detail_route.tcl
@@ -1,6 +1,7 @@
 utl::set_metrics_stage "detailedroute__{}"
 source $::env(SCRIPTS_DIR)/load.tcl
 load_design 5_1_grt.odb 5_1_grt.sdc
+source_step_tcl PRE DETAIL_ROUTE
 if { ![grt::have_routes] } {
   error "Global routing failed, run `make gui_grt` and load $::global_route_congestion_report \
         in DRC viewer to view congestion"
@@ -69,7 +70,7 @@ if {
   utl::metric_int "antenna_diodes_count" -1
 }
 
-source_env_var_if_exists POST_DETAIL_ROUTE_TCL
+source_step_tcl POST DETAIL_ROUTE
 
 check_antennas -report_file $env(REPORTS_DIR)/drt_antennas.log
 
diff --git a/flow/scripts/fillcell.tcl b/flow/scripts/fillcell.tcl
@@ -2,6 +2,7 @@ source $::env(SCRIPTS_DIR)/load.tcl
 erase_non_stage_variables route
 if { [env_var_exists_and_non_empty FILL_CELLS] } {
   load_design 5_2_route.odb 5_1_grt.sdc
+  source_step_tcl PRE FILLCELL
 
   set_propagated_clock [all_clocks]
 
@@ -12,3 +13,5 @@ if { [env_var_exists_and_non_empty FILL_CELLS] } {
 } else {
   log_cmd exec cp $::env(RESULTS_DIR)/5_2_route.odb $::env(RESULTS_DIR)/5_3_fillcell.odb
 }
+
+source_step_tcl POST FILLCELL
diff --git a/flow/scripts/final_report.tcl b/flow/scripts/final_report.tcl
@@ -2,6 +2,7 @@ utl::set_metrics_stage "finish__{}"
 source $::env(SCRIPTS_DIR)/load.tcl
 erase_non_stage_variables final
 load_design 6_1_fill.odb 6_1_fill.sdc
+source_step_tcl PRE FINAL_REPORT
 
 set_propagated_clock [all_clocks]
 
@@ -63,6 +64,8 @@ report_cell_usage
 
 report_metrics 6 "finish"
 
+source_step_tcl POST FINAL_REPORT
+
 # Save a final image if openroad is compiled with the gui
 if { [ord::openroad_gui_compiled] } {
   gui::show "source $::env(SCRIPTS_DIR)/save_images.tcl" false
diff --git a/flow/scripts/floorplan.tcl b/flow/scripts/floorplan.tcl
@@ -2,6 +2,7 @@ utl::set_metrics_stage "floorplan__{}"
 source $::env(SCRIPTS_DIR)/load.tcl
 erase_non_stage_variables floorplan
 load_design 1_synth.odb 1_synth.sdc
+source_step_tcl PRE FLOORPLAN
 
 proc report_unused_masters { } {
   set db [ord::get_db]
@@ -148,7 +149,7 @@ report_units
 report_units_metric
 report_metrics 2 "floorplan final" false false
 
-source_env_var_if_exists POST_FLOORPLAN_TCL
+source_step_tcl POST FLOORPLAN
 source_env_var_if_exists IO_CONSTRAINTS
 
 orfs_write_db $::env(RESULTS_DIR)/2_1_floorplan.odb
diff --git a/flow/scripts/global_place.tcl b/flow/scripts/global_place.tcl
@@ -2,6 +2,7 @@ utl::set_metrics_stage "globalplace__{}"
 source $::env(SCRIPTS_DIR)/load.tcl
 erase_non_stage_variables place
 load_design 3_2_place_iop.odb 2_floorplan.sdc
+source_step_tcl PRE GLOBAL_PLACE
 
 set_dont_use $::env(DONT_USE_CELLS)
 
@@ -74,4 +75,6 @@ if { $::env(CLUSTER_FLOPS) } {
 
 report_metrics 3 "global place" false false
 
+source_step_tcl POST GLOBAL_PLACE
+
 orfs_write_db $::env(RESULTS_DIR)/3_3_place_gp.odb
diff --git a/flow/scripts/global_place_skip_io.tcl b/flow/scripts/global_place_skip_io.tcl
@@ -1,6 +1,7 @@
 source $::env(SCRIPTS_DIR)/load.tcl
 erase_non_stage_variables place
 load_design 2_floorplan.odb 2_floorplan.sdc
+source_step_tcl PRE GLOBAL_PLACE_SKIP_IO
 
 if { [env_var_exists_and_non_empty FLOORPLAN_DEF] } {
   puts "FLOORPLAN_DEF is set. Skipping global placement without IOs"
@@ -13,4 +14,6 @@ if { [env_var_exists_and_non_empty FLOORPLAN_DEF] } {
     {*}[env_var_or_empty GLOBAL_PLACEMENT_ARGS]
 }
 
+source_step_tcl POST GLOBAL_PLACE_SKIP_IO
+
 orfs_write_db $::env(RESULTS_DIR)/3_1_place_gp_skip_io.odb
diff --git a/flow/scripts/global_route.tcl b/flow/scripts/global_route.tcl
@@ -6,7 +6,7 @@ load_design 4_cts.odb 4_cts.sdc
 # This proc is here to allow us to use 'return' to return early from this
 # file which is sourced
 proc global_route_helper { } {
-  source_env_var_if_exists PRE_GLOBAL_ROUTE_TCL
+  source_step_tcl PRE GLOBAL_ROUTE
 
   set res_aware ""
   append_env_var res_aware ENABLE_RESISTANCE_AWARE -resistance_aware 0
@@ -113,6 +113,7 @@ proc global_route_helper { } {
   source [file join $::env(SCRIPTS_DIR) "write_ref_sdc.tcl"]
 
   write_guides $::env(RESULTS_DIR)/route.guide
+  source_step_tcl POST GLOBAL_ROUTE
   orfs_write_db $::env(RESULTS_DIR)/5_1_grt.odb
   orfs_write_sdc $::env(RESULTS_DIR)/5_1_grt.sdc
 }
diff --git a/flow/scripts/io_placement.tcl b/flow/scripts/io_placement.tcl
@@ -7,6 +7,7 @@ if {
   ![env_var_exists_and_non_empty FOOTPRINT_TCL]
 } {
   load_design 3_1_place_gp_skip_io.odb 2_floorplan.sdc
+  source_step_tcl PRE IO_PLACEMENT
   log_cmd place_pins \
     -hor_layers $::env(IO_PLACER_H) \
     -ver_layers $::env(IO_PLACER_V) \
@@ -16,3 +17,5 @@ if {
 } else {
   log_cmd exec cp $::env(RESULTS_DIR)/3_1_place_gp_skip_io.odb $::env(RESULTS_DIR)/3_2_place_iop.odb
 }
+
+source_step_tcl POST IO_PLACEMENT
diff --git a/flow/scripts/macro_place.tcl b/flow/scripts/macro_place.tcl
@@ -1,8 +1,11 @@
 source $::env(SCRIPTS_DIR)/load.tcl
 erase_non_stage_variables floorplan
 load_design 2_1_floorplan.odb 2_1_floorplan.sdc
+source_step_tcl PRE MACRO_PLACE
 
 source $::env(SCRIPTS_DIR)/macro_place_util.tcl
 
+source_step_tcl POST MACRO_PLACE
+
 orfs_write_db $::env(RESULTS_DIR)/2_2_floorplan_macro.odb
 write_macro_placement $::env(RESULTS_DIR)/2_2_floorplan_macro.tcl
diff --git a/flow/scripts/pdn.tcl b/flow/scripts/pdn.tcl
@@ -1,11 +1,12 @@
 source $::env(SCRIPTS_DIR)/load.tcl
 erase_non_stage_variables floorplan
 load_design 2_3_floorplan_tapcell.odb 2_1_floorplan.sdc
+source_step_tcl PRE PDN
 
 source $::env(PDN_TCL)
 pdngen
 
-source_env_var_if_exists POST_PDN_TCL
+source_step_tcl POST PDN
 
 # Check all supply nets
 set block [ord::get_db_block]
diff --git a/flow/scripts/repair_timing_post_place.tcl b/flow/scripts/repair_timing_post_place.tcl
@@ -2,6 +2,7 @@ utl::set_metrics_stage "place_repair_timing__{}"
 source $::env(SCRIPTS_DIR)/load.tcl
 erase_non_stage_variables place
 load_design 3_5_place_dp.odb 3_place.sdc
+source_step_tcl PRE REPAIR_TIMING_POST_PLACE
 
 set_placement_padding -global \
   -left $::env(CELL_PAD_IN_SITES_DETAIL_PLACEMENT) \
@@ -18,4 +19,6 @@ puts "Estimate parasitics"
 log_cmd estimate_parasitics -placement
 report_metrics 3 "place repair timing" true false
 
+source_step_tcl POST REPAIR_TIMING_POST_PLACE
+
 orfs_write_db $::env(RESULTS_DIR)/3_6_place_repair_timing.odb
diff --git a/flow/scripts/resize.tcl b/flow/scripts/resize.tcl
@@ -2,6 +2,7 @@ utl::set_metrics_stage "placeopt__{}"
 source $::env(SCRIPTS_DIR)/load.tcl
 erase_non_stage_variables place
 load_design 3_3_place_gp.odb 2_floorplan.sdc
+source_step_tcl PRE RESIZE
 
 log_cmd estimate_parasitics -placement
 
@@ -35,4 +36,6 @@ report_metrics 3 "resizer" true false
 puts "Instance count before $instance_count_before, after [sta::network_leaf_instance_count]"
 puts "Pin count before $pin_count_before, after [sta::network_leaf_pin_count]"
 
+source_step_tcl POST RESIZE
+
 orfs_write_db $::env(RESULTS_DIR)/3_4_place_resized.odb
diff --git a/flow/scripts/synth_odb.tcl b/flow/scripts/synth_odb.tcl
@@ -2,7 +2,9 @@ utl::set_metrics_stage "floorplan__{}"
 source $::env(SCRIPTS_DIR)/load.tcl
 erase_non_stage_variables synth
 load_design 1_2_yosys.v 1_2_yosys.sdc
+source_step_tcl PRE SYNTH
 
+source_step_tcl POST SYNTH
 orfs_write_db $::env(RESULTS_DIR)/1_synth.odb
 # Canonicalize 1_synth.sdc. The original SDC_FILE provided by
 # the user could have dependencies, such as sourcing util.tcl,
diff --git a/flow/scripts/tapcell.tcl b/flow/scripts/tapcell.tcl
@@ -2,11 +2,14 @@ source $::env(SCRIPTS_DIR)/load.tcl
 erase_non_stage_variables floorplan
 
 load_design 2_2_floorplan_macro.odb 2_1_floorplan.sdc
+source_step_tcl PRE TAPCELL
 
 if { [env_var_exists_and_non_empty TAPCELL_TCL] } {
   source $::env(TAPCELL_TCL)
 } else {
   cut_rows
 }
 
+source_step_tcl POST TAPCELL
+
 orfs_write_db $::env(RESULTS_DIR)/2_3_floorplan_tapcell.odb
diff --git a/flow/scripts/util.tcl b/flow/scripts/util.tcl
@@ -197,6 +197,7 @@ proc source_env_var_if_exists { env_var } {
   }
 }
 
+
 # Feature toggle for now, eventually the -hier option
 # will be default and this code will be deleted.
 proc hier_options { } {
@@ -295,3 +296,8 @@ proc orfs_write_sdc { output_file } {
   }
   log_cmd write_sdc -no_timestamp $output_file
 }
+
+proc source_step_tcl { hook_type step_name } {
+  set env_var "${hook_type}_${step_name}_TCL"
+  source_env_var_if_exists $env_var
+}
diff --git a/flow/scripts/variables.yaml b/flow/scripts/variables.yaml
