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Merge remote-tracking branch 'private/master' into secure-add-report-design-area
2 parents 7b683aa + 9f21ca7 commit 34f41c1

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‎docs/user/FlowVariables.md‎

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@@ -192,7 +192,39 @@ configuration file.
192192
| <a name="PLATFORM"></a>PLATFORM| Specifies process design kit or technology node to be used.| |
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| <a name="PLATFORM_TCL"></a>PLATFORM_TCL| Specifies a Tcl script with commands to run before loading design.| |
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| <a name="POST_CTS_TCL"></a>POST_CTS_TCL| Specifies a Tcl script with commands to run after CTS is completed.| |
195+
| <a name="POST_DENSITY_FILL_TCL"></a>POST_DENSITY_FILL_TCL| Specifies a Tcl script with commands to run after density fill.| |
196+
| <a name="POST_DETAIL_PLACE_TCL"></a>POST_DETAIL_PLACE_TCL| Specifies a Tcl script with commands to run after detailed placement.| |
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| <a name="POST_DETAIL_ROUTE_TCL"></a>POST_DETAIL_ROUTE_TCL| Specifies a Tcl script with commands to run after detailed route.| |
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| <a name="POST_FILLCELL_TCL"></a>POST_FILLCELL_TCL| Specifies a Tcl script with commands to run after fillcell insertion.| |
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| <a name="POST_FINAL_REPORT_TCL"></a>POST_FINAL_REPORT_TCL| Specifies a Tcl script with commands to run after final report generation.| |
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| <a name="POST_FLOORPLAN_TCL"></a>POST_FLOORPLAN_TCL| Specifies a Tcl script with commands to run after floorplan is completed.| |
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| <a name="POST_GLOBAL_PLACE_SKIP_IO_TCL"></a>POST_GLOBAL_PLACE_SKIP_IO_TCL| Specifies a Tcl script with commands to run after global placement (skip IO).| |
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| <a name="POST_GLOBAL_PLACE_TCL"></a>POST_GLOBAL_PLACE_TCL| Specifies a Tcl script with commands to run after global placement.| |
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| <a name="POST_GLOBAL_ROUTE_TCL"></a>POST_GLOBAL_ROUTE_TCL| Specifies a Tcl script with commands to run after global route.| |
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| <a name="POST_IO_PLACEMENT_TCL"></a>POST_IO_PLACEMENT_TCL| Specifies a Tcl script with commands to run after IO placement.| |
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| <a name="POST_MACRO_PLACE_TCL"></a>POST_MACRO_PLACE_TCL| Specifies a Tcl script with commands to run after macro placement.| |
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| <a name="POST_PDN_TCL"></a>POST_PDN_TCL| Specifies a Tcl script with commands to run after PDN generation.| |
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| <a name="POST_REPAIR_TIMING_POST_PLACE_TCL"></a>POST_REPAIR_TIMING_POST_PLACE_TCL| Specifies a Tcl script with commands to run after post-place timing repair.| |
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| <a name="POST_RESIZE_TCL"></a>POST_RESIZE_TCL| Specifies a Tcl script with commands to run after resize.| |
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| <a name="POST_SYNTH_TCL"></a>POST_SYNTH_TCL| Specifies a Tcl script with commands to run after synthesis ODB generation.| |
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| <a name="POST_TAPCELL_TCL"></a>POST_TAPCELL_TCL| Specifies a Tcl script with commands to run after tapcell.| |
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| <a name="PRE_CTS_TCL"></a>PRE_CTS_TCL| Specifies a Tcl script with commands to run before CTS.| |
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| <a name="PRE_DENSITY_FILL_TCL"></a>PRE_DENSITY_FILL_TCL| Specifies a Tcl script with commands to run before density fill.| |
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| <a name="PRE_DETAIL_PLACE_TCL"></a>PRE_DETAIL_PLACE_TCL| Specifies a Tcl script with commands to run before detailed placement.| |
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| <a name="PRE_DETAIL_ROUTE_TCL"></a>PRE_DETAIL_ROUTE_TCL| Specifies a Tcl script with commands to run before detailed route.| |
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| <a name="PRE_FILLCELL_TCL"></a>PRE_FILLCELL_TCL| Specifies a Tcl script with commands to run before fillcell insertion.| |
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| <a name="PRE_FINAL_REPORT_TCL"></a>PRE_FINAL_REPORT_TCL| Specifies a Tcl script with commands to run before final report generation.| |
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| <a name="PRE_FLOORPLAN_TCL"></a>PRE_FLOORPLAN_TCL| Specifies a Tcl script with commands to run before floorplan.| |
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| <a name="PRE_GLOBAL_PLACE_SKIP_IO_TCL"></a>PRE_GLOBAL_PLACE_SKIP_IO_TCL| Specifies a Tcl script with commands to run before global placement (skip IO).| |
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| <a name="PRE_GLOBAL_PLACE_TCL"></a>PRE_GLOBAL_PLACE_TCL| Specifies a Tcl script with commands to run before global placement.| |
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| <a name="PRE_GLOBAL_ROUTE_TCL"></a>PRE_GLOBAL_ROUTE_TCL| Specifies a Tcl script with commands to run before global route.| |
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| <a name="PRE_IO_PLACEMENT_TCL"></a>PRE_IO_PLACEMENT_TCL| Specifies a Tcl script with commands to run before IO placement.| |
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| <a name="PRE_MACRO_PLACE_TCL"></a>PRE_MACRO_PLACE_TCL| Specifies a Tcl script with commands to run before macro placement.| |
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| <a name="PRE_PDN_TCL"></a>PRE_PDN_TCL| Specifies a Tcl script with commands to run before PDN generation.| |
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| <a name="PRE_REPAIR_TIMING_POST_PLACE_TCL"></a>PRE_REPAIR_TIMING_POST_PLACE_TCL| Specifies a Tcl script with commands to run before post-place timing repair.| |
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| <a name="PRE_RESIZE_TCL"></a>PRE_RESIZE_TCL| Specifies a Tcl script with commands to run before resize.| |
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| <a name="PRE_SYNTH_TCL"></a>PRE_SYNTH_TCL| Specifies a Tcl script with commands to run before synthesis ODB generation.| |
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| <a name="PRE_TAPCELL_TCL"></a>PRE_TAPCELL_TCL| Specifies a Tcl script with commands to run before tapcell.| |
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| <a name="PROCESS"></a>PROCESS| Technology node or process in use.| |
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| <a name="PWR_NETS_VOLTAGES"></a>PWR_NETS_VOLTAGES| Used for IR Drop calculation.| |
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| <a name="RCX_RULES"></a>RCX_RULES| RC Extraction rules file path.| |
@@ -291,6 +323,8 @@ configuration file.
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- [DFF_MAP_FILE](#DFF_MAP_FILE)
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- [LATCH_MAP_FILE](#LATCH_MAP_FILE)
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- [MIN_BUF_CELL_AND_PORTS](#MIN_BUF_CELL_AND_PORTS)
326+
- [POST_SYNTH_TCL](#POST_SYNTH_TCL)
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- [PRE_SYNTH_TCL](#PRE_SYNTH_TCL)
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- [SDC_FILE](#SDC_FILE)
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- [SDC_GUT](#SDC_GUT)
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- [SYNTH_ARGS](#SYNTH_ARGS)
@@ -349,6 +383,14 @@ configuration file.
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- [PLACE_DENSITY](#PLACE_DENSITY)
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- [PLACE_DENSITY_LB_ADDON](#PLACE_DENSITY_LB_ADDON)
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- [PLACE_SITE](#PLACE_SITE)
386+
- [POST_FLOORPLAN_TCL](#POST_FLOORPLAN_TCL)
387+
- [POST_MACRO_PLACE_TCL](#POST_MACRO_PLACE_TCL)
388+
- [POST_PDN_TCL](#POST_PDN_TCL)
389+
- [POST_TAPCELL_TCL](#POST_TAPCELL_TCL)
390+
- [PRE_FLOORPLAN_TCL](#PRE_FLOORPLAN_TCL)
391+
- [PRE_MACRO_PLACE_TCL](#PRE_MACRO_PLACE_TCL)
392+
- [PRE_PDN_TCL](#PRE_PDN_TCL)
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- [PRE_TAPCELL_TCL](#PRE_TAPCELL_TCL)
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- [REMOVE_ABC_BUFFERS](#REMOVE_ABC_BUFFERS)
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- [ROUTING_LAYER_ADJUSTMENT](#ROUTING_LAYER_ADJUSTMENT)
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- [RTLMP_AREA_WT](#RTLMP_AREA_WT)
@@ -408,6 +450,18 @@ configuration file.
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- [PLACE_DENSITY](#PLACE_DENSITY)
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- [PLACE_DENSITY_LB_ADDON](#PLACE_DENSITY_LB_ADDON)
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- [PLACE_PINS_ARGS](#PLACE_PINS_ARGS)
453+
- [POST_DETAIL_PLACE_TCL](#POST_DETAIL_PLACE_TCL)
454+
- [POST_GLOBAL_PLACE_SKIP_IO_TCL](#POST_GLOBAL_PLACE_SKIP_IO_TCL)
455+
- [POST_GLOBAL_PLACE_TCL](#POST_GLOBAL_PLACE_TCL)
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- [POST_IO_PLACEMENT_TCL](#POST_IO_PLACEMENT_TCL)
457+
- [POST_REPAIR_TIMING_POST_PLACE_TCL](#POST_REPAIR_TIMING_POST_PLACE_TCL)
458+
- [POST_RESIZE_TCL](#POST_RESIZE_TCL)
459+
- [PRE_DETAIL_PLACE_TCL](#PRE_DETAIL_PLACE_TCL)
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- [PRE_GLOBAL_PLACE_SKIP_IO_TCL](#PRE_GLOBAL_PLACE_SKIP_IO_TCL)
461+
- [PRE_GLOBAL_PLACE_TCL](#PRE_GLOBAL_PLACE_TCL)
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- [PRE_IO_PLACEMENT_TCL](#PRE_IO_PLACEMENT_TCL)
463+
- [PRE_REPAIR_TIMING_POST_PLACE_TCL](#PRE_REPAIR_TIMING_POST_PLACE_TCL)
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- [PRE_RESIZE_TCL](#PRE_RESIZE_TCL)
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- [ROUTING_LAYER_ADJUSTMENT](#ROUTING_LAYER_ADJUSTMENT)
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- [SKIP_REPORT_METRICS](#SKIP_REPORT_METRICS)
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- [TNS_END_PERCENT](#TNS_END_PERCENT)
@@ -430,6 +484,7 @@ configuration file.
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- [MATCH_CELL_FOOTPRINT](#MATCH_CELL_FOOTPRINT)
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- [MAX_REPAIR_TIMING_ITER](#MAX_REPAIR_TIMING_ITER)
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- [POST_CTS_TCL](#POST_CTS_TCL)
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- [PRE_CTS_TCL](#PRE_CTS_TCL)
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- [REMOVE_CELLS_FOR_EQY](#REMOVE_CELLS_FOR_EQY)
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- [REPORT_CLOCK_SKEW](#REPORT_CLOCK_SKEW)
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- [SETUP_REPAIR_SEQUENCE](#SETUP_REPAIR_SEQUENCE)
@@ -453,6 +508,7 @@ configuration file.
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- [MAX_REPAIR_TIMING_ITER](#MAX_REPAIR_TIMING_ITER)
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- [MAX_ROUTING_LAYER](#MAX_ROUTING_LAYER)
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- [MIN_ROUTING_LAYER](#MIN_ROUTING_LAYER)
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- [POST_GLOBAL_ROUTE_TCL](#POST_GLOBAL_ROUTE_TCL)
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- [PRE_GLOBAL_ROUTE_TCL](#PRE_GLOBAL_ROUTE_TCL)
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- [REPORT_CLOCK_SKEW](#REPORT_CLOCK_SKEW)
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- [ROUTING_LAYER_ADJUSTMENT](#ROUTING_LAYER_ADJUSTMENT)
@@ -478,6 +534,10 @@ configuration file.
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- [MAX_REPAIR_ANTENNAS_ITER_DRT](#MAX_REPAIR_ANTENNAS_ITER_DRT)
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- [MAX_ROUTING_LAYER](#MAX_ROUTING_LAYER)
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- [MIN_ROUTING_LAYER](#MIN_ROUTING_LAYER)
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- [POST_DETAIL_ROUTE_TCL](#POST_DETAIL_ROUTE_TCL)
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- [POST_FILLCELL_TCL](#POST_FILLCELL_TCL)
539+
- [PRE_DETAIL_ROUTE_TCL](#PRE_DETAIL_ROUTE_TCL)
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- [PRE_FILLCELL_TCL](#PRE_FILLCELL_TCL)
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- [REPORT_CLOCK_SKEW](#REPORT_CLOCK_SKEW)
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- [ROUTING_LAYER_ADJUSTMENT](#ROUTING_LAYER_ADJUSTMENT)
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- [SKIP_ANTENNA_REPAIR_POST_DRT](#SKIP_ANTENNA_REPAIR_POST_DRT)
@@ -491,6 +551,10 @@ configuration file.
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- [GND_NETS_VOLTAGES](#GND_NETS_VOLTAGES)
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- [MAX_ROUTING_LAYER](#MAX_ROUTING_LAYER)
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- [MIN_ROUTING_LAYER](#MIN_ROUTING_LAYER)
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- [POST_DENSITY_FILL_TCL](#POST_DENSITY_FILL_TCL)
555+
- [POST_FINAL_REPORT_TCL](#POST_FINAL_REPORT_TCL)
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- [PRE_DENSITY_FILL_TCL](#PRE_DENSITY_FILL_TCL)
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- [PRE_FINAL_REPORT_TCL](#PRE_FINAL_REPORT_TCL)
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- [PWR_NETS_VOLTAGES](#PWR_NETS_VOLTAGES)
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- [REPORT_CLOCK_SKEW](#REPORT_CLOCK_SKEW)
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- [ROUTING_LAYER_ADJUSTMENT](#ROUTING_LAYER_ADJUSTMENT)

‎flow/designs/asap7/aes-block/rules-base.json‎

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"value": 7206,
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"compare": "<="
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}
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}
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}

‎flow/designs/ihp-sg13g2/i2c-gpio-expander/I2cDeviceCtrl/pdn.tcl‎

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Original file line numberDiff line numberDiff line change
@@ -11,14 +11,6 @@ add_global_connection -net {VSS} -inst_pattern {.*} -pin_pattern {VSS!} -ground
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add_global_connection -net {VDD} -inst_pattern {.*} -pin_pattern {^VDD$} -power
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add_global_connection -net {VSS} -inst_pattern {.*} -pin_pattern {^VSS$} -ground
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14-
# padframe core power pins
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add_global_connection -net {VDD} -pin_pattern {^vdd$} -power
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add_global_connection -net {VSS} -pin_pattern {^vss$} -ground
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18-
# padframe io power pins
19-
add_global_connection -net {IOVDD} -pin_pattern {^iovdd$} -power
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add_global_connection -net {IOVSS} -pin_pattern {^iovss$} -ground
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global_connect
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# core voltage domain
@@ -29,10 +21,10 @@ define_pdn_grid -name {grid} -voltage_domains {CORE} -pins {Metal4 Metal5}
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add_pdn_stripe -grid {grid} -layer {Metal1} -width {0.44} -pitch {7.56} -offset {0} \
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-followpins
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add_pdn_ring -grid {grid} -layers {Metal4 Metal5} -widths {3.0} -spacings {2.0} \
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-core_offsets {4.5} -connect_to_pads
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add_pdn_stripe -grid {grid} -layer {Metal4} -width {1.840} -pitch {75.6} -offset {13.6} \
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-core_offsets {4.5}
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add_pdn_stripe -grid {grid} -layer {Metal4} -width {2.0} -pitch {40.0} -offset {10.0} \
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-extend_to_core_ring
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add_pdn_stripe -grid {grid} -layer {Metal5} -width {1.840} -pitch {75.6} -offset {13.6} \
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add_pdn_stripe -grid {grid} -layer {Metal5} -width {2.0} -pitch {40.0} -offset {10.0} \
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-extend_to_core_ring
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add_pdn_connect -grid {grid} -layers {Metal1 Metal4}
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add_pdn_connect -grid {grid} -layers {Metal4 Metal5}

‎flow/designs/ihp-sg13g2/i2c-gpio-expander/config.mk‎

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@@ -40,6 +40,8 @@ sg13g2_IOPadIOVss_inst \
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sg13g2_IOPadIOVdd_inst
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export FOOTPRINT_TCL = $(PLATFORM_DIR)/pad.tcl
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43+
export MACRO_PLACEMENT_TCL = $(DESIGN_HOME)/$(PLATFORM)/$(DESIGN_NICKNAME)/macros.tcl
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export PDN_TCL = $(DESIGN_HOME)/$(PLATFORM)/$(DESIGN_NICKNAME)/pdn.tcl
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export BLOCKS = I2cDeviceCtrl

‎flow/designs/ihp-sg13g2/i2c-gpio-expander/macros.tcl‎

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@@ -0,0 +1 @@
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place_macro -macro_name system_expander.i2cCtrl -location {375.54 372} -orientation R0 -exact

‎flow/designs/ihp-sg13g2/i2c-gpio-expander/pdn.tcl‎

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -20,13 +20,15 @@ set_voltage_domain -name {CORE} -power {VDD} -ground {VSS}
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define_pdn_grid -name {grid} -voltage_domains {CORE} -pins {TopMetal1 TopMetal2}
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add_pdn_stripe -grid {grid} -layer {Metal1} -width {0.44} -pitch {7.56} -offset {0} \
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-followpins -extend_to_core_ring
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add_pdn_ring -grid {grid} -layers {TopMetal1 TopMetal2} -widths {8.0} -spacings {5.0} \
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add_pdn_ring -grid {grid} -layers {Metal5 TopMetal1} -widths {8.0} -spacings {5.0} \
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-core_offsets {4.5} -connect_to_pads
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add_pdn_stripe -grid {grid} -layer {TopMetal1} -width {2.200} -pitch {75.6} -offset {13.6} \
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add_pdn_stripe -grid {grid} -layer {TopMetal1} -width {4.0} -pitch {60.0} -offset {10.0} \
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-extend_to_core_ring
27-
add_pdn_stripe -grid {grid} -layer {TopMetal2} -width {2.200} -pitch {75.6} -offset {13.6} \
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add_pdn_stripe -grid {grid} -layer {TopMetal2} -width {4.0} -pitch {60.0} -offset {10.0} \
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-extend_to_core_ring
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add_pdn_connect -grid {grid} -layers {Metal1 TopMetal1}
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add_pdn_connect -grid {grid} -layers {Metal5 TopMetal1}
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add_pdn_connect -grid {grid} -layers {Metal5 TopMetal2}
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add_pdn_connect -grid {grid} -layers {TopMetal1 TopMetal2}
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define_pdn_grid \

‎flow/designs/nangate45/ariane133/rules-base.json‎

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"value": 840911,
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"compare": "<="
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}
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}
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}

‎flow/designs/nangate45/bp_fe_top/rules-base.json‎

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"value": 247483,
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"compare": "<="
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}
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}
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}

‎flow/designs/nangate45/bp_multi_top/rules-base.json‎

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@@ -99,4 +99,4 @@
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"value": 587157,
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"compare": "<="
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}
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}
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}

‎flow/designs/nangate45/mempool_group/rules-base.json‎

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@@ -1,18 +1,18 @@
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{
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"synth__design__instance__area__stdcell": {
3-
"value": 271098.37,
3+
"value": 424000.0,
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"compare": "<="
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},
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"constraints__clocks__count": {
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"value": 2,
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"compare": "=="
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},
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"placeopt__design__instance__area": {
11-
"value": 295108,
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"value": 451188,
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"compare": "<="
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},
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"placeopt__design__instance__count__stdcell": {
15-
"value": 163160,
15+
"value": 198708,
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"compare": "<="
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},
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"detailedplace__design__violations": {
@@ -32,7 +32,7 @@
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"compare": ">="
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},
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"cts__timing__setup__tns": {
35-
"value": -10300.0,
35+
"value": -11900.0,
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"compare": ">="
3737
},
3838
"cts__timing__hold__ws": {
@@ -52,7 +52,7 @@
5252
"compare": ">="
5353
},
5454
"globalroute__timing__setup__tns": {
55-
"value": -11100.0,
55+
"value": -14200.0,
5656
"compare": ">="
5757
},
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"globalroute__timing__hold__ws": {
@@ -64,7 +64,7 @@
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"compare": ">="
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},
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"detailedroute__route__wirelength": {
67-
"value": 4029078,
67+
"value": 5795200,
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"compare": "<="
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},
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"detailedroute__route__drc_errors": {
@@ -96,7 +96,7 @@
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"compare": ">="
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},
9898
"finish__design__instance__area": {
99-
"value": 303227,
99+
"value": 461696,
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"compare": "<="
101101
}
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}

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